Department of Computer Science

Introduction to Computing Environments

Input Output (I/O)


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Contents

Preview
Objectives
I/O device characteristics
Requirements for sufficient and effective handling of I/O
Interface modules
Modes of I/O Transfer: Programmed I/O
Modes of I/O Transfer: Interrupt driven I/O
Modes of I/O Transfer: DMA I/O
Exercises


Preview

Input-Output (I/O) describes the transference of information between main memory and the various peripheral devices attached to a computer. Peripheral devices are slower than CPUs and require special . Interface modules are used to match CPU and main memory characteristics to those of the peripheral devices. This document describes the basic principles of interfacing and the methods used for scheduling data transfer.

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Objectives

· To identify different types of input and output devices of a typical computer system.

· To discuss how input/output devices communicate within a computer system.

· To discuss how a typical computer system handles input/output devices.

· For the student to be able to identify and describe the functions of different input/output devices.

· For the student to be able todescribe the characteristics of input/output devices.

· For the student to explain how a typical computer system handles input/output devices.

 

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Reading

 

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I/O device characteristics

The speed of data transfer and the quantity of data that is transferred are two critical factors of I/O devices. For example, a keyboard is a character–based input device, and each character of a keyboard is inputted into a PC as an ASCII code. Keyboard input is very slow.

Task

Why is character input slow?

There are different types of character input from a keyboard. There is an expected input by an application program in response to a ‘read statement’ of some kind that requests input of data for the program, think about data-entry into an expert system. On other occasions, the user may wish to interrupt what the computer is doing. For example, under the ‘Unix’ operating system typing Control-c will stop a program that is running, in contrast under a ‘Windows type’ operating system typing Control-c is an editing command to copy data and typing Control, Alt, Delete will restart a PC. In terms of computation these are examples of unexpected inputs, since the program that is undergoing execution is not expecting such inputs or interrupts.

On a multiuser system, many keyboards might be connected to a single computer. The computer must have the capability to distinguish between the different keyboards. The computer must not lose input data even if several keyboards transmit a character input simultaneously. The computer must be able to respond quickly to each keyboard, and the physical distances of the keyboards to the computer may be long.

Task

How do you think a mouse action can act as an interrupt?

Disks, printers, screens and other I/O devices operate under the CPU program control. VDUs and most printers are output devices, and the output that is produced is determined by the program undergoing execution. Disks are storage devices, but as we have previously discussed there can be a ‘blur’ to this concept and disks can be considered to be both I/O devices as well as storage devices, where the input and the output are determined by the program undergoing execution. In these cases, it is always the program undergoing execution in the CPU that initiates I/O data transfer. Furthermore, the CPU will continue processing other tasks while waiting for a particular I/O operation to complete.

There are occasions when an I/O device being addressed is busy or not ready. For example, a printer may already have a print job, or it may be stalled due to a miss feed of paper. There might not be a floppy disk in a floppy disk drive or a hard disk might be servicing a different request. In such cases, it is beneficial for the I/O device to be able to provide status information to the CPU, in order that appropriate action can be taken.

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Requirements for sufficient and effective handling of I/O

We can now see that there are numerous requirements that must be met for a computer system to handle I/O in a sufficient and effective manner.

a) There must be a means for individually addressing different I/O devices.

b) There must be mechanisms by which I/O devices can communicate with the CPU.

c) Programmed I/O is suitable for slow devices and word transfers.

d) Faster I/O devices must have mechanisms to transfer blocks of data.

e) There must be mechanisms to handle devices with extremely different control requirements.

Consequently, it is impractical to connect I/O devices directly to a CPU without some form of interface unit that is unique to each device. For example, the formats required by different devices are different. Some devices require a single portion of data, others a block of data. Some devices expect 8 bits of data, others 16, 32 or even 64.Data may be transmitted serially or in parallel. Therefore, a computer system requires substantially different interface hardware and software for each I/O device.

Incompatibilities in speed between the various I/O devices and the CPU render synchronisation a major problem. Magnetic disks have electromechanical control requirements that must be met. Such control requirements would consume a vast amount of CPU time.

I/O devices therefore have different requirements. Additionally, there is a necessity for the provision of addressing, synchronisation, status control and external control capabilities. Consequently, each I/O device requires its own unique interface module to serve between itself and the CPU.

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Interface modules

Interface modules can be very simple and control a single I/O device. Alternatively, interface modules can be complex, controlling many I/O devices and may have substantial built in intelligence, see Figure 1 REF _Ref495491946 \* MERGEFORMAT .



Figure1 I/O module arrangement

There are many types of interface modules, but they all have one important characteristic, which distinguishes whether they support parallel data transfer or serial data transfer.

A parallel interface transfers multiple bits of data simultaneously using a separate data line for each bit, see Figure 2 . In contrast, a serial interface transfers single bits of data consecutively over a single data line, see Figure 3



Figure2 Parallel data transfer



Figure3 Serial data transfer

Task

1) Think of an example of a parallel device that:

a) can also be a serial device,

b) cannot be a serial device.

2) Think of an example of a serial device that cannot also be a parallel device.

3) What are the benefits

a) of a parallel device?

b) of a serial device?

It is possible to transfer data a word[1] at a time, which is adequate for slow operating I/O devices. However, the amount of data that is transferred between devices such as disks and tapes renders word transfer far too slow for modern high-speed computers. Consequently, blocks of data are transferred.

A further problem is that a computer has many I/O devices, and many may attempt to transfer data simultaneously. Therefore, there is a requirement to distinguish and separate I/O from these different devices. As we saw in the Storage Device lecture, different devices operate at different speeds to each other and the CPU. For example, a dot-matrix printer may output 40 characters/sec, whereas a disk might transfer data at millions of bytes/sec. To prevent data loss such I/O operations must be synchronised.

For example, figure 4 REF _Ref495931498 \* MERGEFORMAT shows a simple parallel I/O interface. The unit is composed of three registers: a data register, a control register and a status register, which can be accessed by the CPU over the system bus. The external data bus is a collection of parallel data lines that can be configured to be either input or output by writing a suitable bit pattern into the control register. Once configured, data is transferred to or from the external data bus by reading or writing from or to the data register or port. This data port, therefore, serves as a buffer between the system bus and the external data bus. The status register is used to flag whether a device is ready and data is available. The CPU by using the control bus can inspect the status register to determine whether data can be sent or received.

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Figure 4 Parallel I/O interface module

The data bus must be able to support data transfer with a wide range of peripheral devices. The speeds of the different peripheral devices are usually known, therefore control or handshake signals are provided to synchronise the bus activities of the interface device and the I/O device, see Figure 5. The example typically represents how data is transferred from an output port to a peripheral device such as a printer. A handshake protocol is used that uses two control lines: data available and data accepted.

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Figure5 Handshaking data transfer

The handshake is initiated by the interface module, which puts data on the data bus and asserts the data available control line. When the peripheral device (in this case a printer) detects this signal, it reads the data from the bus and broadcasts an acknowledgement by asserting the data accepted control line. When the interface module receives this acknowledgement, it negates the data available control line. After the printer has completed processing, it negates the data accepted control line and the handshake is completed.

I/O operations consume large amounts of processing time. Even if a block of data is transferred between a disk and the CPU in a single instruction, a large amount of time is wasted waiting for the task to complete. For example, a CPU could execute many instructions in that time that a single character is printed. It is advantageous to enable the CPU to process other tasks while a slow I/O transfer is taking place.

 

 

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Modes of I/O Transfer: Programmed I/O

There are three ways by which the transfer of data between an I/O device and memory can be managed or scheduled: programmed I/O, interrupt-controlled I/O and Direct Memory Access (DMA).

Many I/O modules permit control lines to be programmed to suit the needs of a particular peripheral device. With programmed I/O the CPU has control over all aspects of the data transfer. Each data transfer is carried out by executing a polling loop, such as the one shown in Figure 6



Figure6 Polling loop

In this example, the processor schedules data transfer to a peripheral device by first reading the port status register to see if the peripheral device is ready to transmit or receive data. In the case that the I/O device is ready because the examine flag is asserted, data is transferred and the processor loops back. In the case that the I/O device is not ready because the examine flag is negated, the processor loops back.

The major disadvantage of programmed I/O is the polling loop, or busy waiting, can waste large amounts of CPU time, and it is therefore inefficient in terms of CPU usage. Programmed I/O is slow and is suitable for character transmission I/O devices such as printers, keyboards and monitors.

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Modes of I/O Transfer: Interrupt driven I/O

With interrupt driven I/O the normal flow of a program is interrupted to react to a special event. For example, typing Control, Alt, Delete on a PC interrupts the program that is running and restarts the PC. Interrupt driven I/O is more efficient than programmed I/O, because an I/O device signals the CPU when it requires a service. Consequently, interrupt driven I/O frees the CPU to continue executing other tasks.

Most computers have interrupt lines to detect and record the arrival of an interrupt request. It is common for a PC to have between 8 and 15 interrupt lines, which are labelled IRQ1, IRQ2 and so on, where IRQ represents InterruptReQuest. In the case that an IRQ is asserted the computer suspends the program that is undergoing execution.

When an interrupt is accepted, the CPU passes program control to an interrupt handler or service routine. Before control is passes to the interrupt handler, the PC and status register are saved by pushing them onto a Return Address Stack (RAS). The interrupt handling program is now executed until a ReTurn from Exception (RTE) instruction is encountered at the end of the interrupt.Once the interrupt has been completed the PC and status register is popped from the RAS, and control is passed back to the interrupted program.

Multiple interrupts can occur together, in which case a priority mechanism must decide the order in which the interrupts are handled.

There are two major disadvantages of interrupt driven I/O.First, all data transfers involve moving data to and from the CPU registers.Second, since the PC and Status Register are pushed onto the RAS before control is passed to the interrupt handler and they are popped from the RAS when an RTE is encountered, then a significant overhead is involved which can impact on processor performance.

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Modes of I/O Transfer: DMA I/O

An alternative mechanism that avoids the use of the CPU is called Direct Memory Access (DMA). Many device controllers, particularly those used for block devices such as magnetic disks use DMA, see storage device handout. Data is directly transferred between a peripheral device from main memory and the CPU is bypassed. Once the data has been transferred the Interface module notifies the CPU, so that the CPU is aware that the data transfer has completed and main memory access can then resume.

Data transfer is initiated using programmed I/O by the program that is undergoing execution in the CPU. The CPU is then bypassed for the remainder of the interrupt.

There are several advantages of DMA. First DMA is particularly good at fast data transfers. Second, since the CPU can be used for other tasks, then DMA is particularly useful in a multitasking system, and multiuser systems. DMA is not restricted to I/O device – Memory transfers, it can be used with other high-speed devices. For example, DMA is an effective means of transferring video data from memory to a video I/O device for rapid display.

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Exercises

You may have to research some of these exercises from other sources. See your reading list for possible sources of information. Keep your answers brief.

1. Why would DMA be useless if the system did not support interrupt capability?

2. DMA is rarely used with computer terminals. Why?

3. In the case that an interrupt occurs at the end of a disk transfer.

3.1. “Who” is interrupting “whom”?

3.2. Why is an interrupt used?

3.3. What would be required if interrupts were not supported?

3.4. What are the steps that take place for an interrupt to be effective?

4. What are the trade-offs between a serial bus and a parallel bus?

5. What is polling? What are the disadvantages of polling? Describe a better mechanism?

6. How do you think a system handles multiple interrupts?

Solutions to Exercises



[1] A byte is usually accepted to be 8 bits.Bytes are grouped into words.A computer with a 16-bit word has 2 bytes/word, whereas a computer with a 32-bit word has 4 bytes/word and a computer with a 64-bit word has 8 bytes/word.


Last Updated: 12/09/2002 by Mariana, Daniel or Colin

© University of Hertfordshire Higher Education Corporation (2002)

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